ASIC inhibits addiction

High Performance Fuzzy ASIC

Energy Recovering ASIC Design

Dissipation in the clock tree and state elements of ASIC designs is often a significant fraction of total energy consumption. We propose a methodology for recovering most of this energy by using a novel energy recovering flip-flop and a novel single-phase resonant clock generator. As our state element has near-zero energy consumption when the input data is not switching, it provides the savings...

The IBM ASIC/SoC

This paper describes the methodology employed by the IBM Microelectronics Division for the design of its Blue Logic applicationspecific integrated circuits (ASICs) and system-on-a-chip (SoC) designs. This methodology is used by both IBM ASIC and SoC designers, as well as OEM customers. A key focus of the IBM ASIC/SoC methodology, outlined in the first section of this paper, is the first-time-ri...

ASIC Design at Home

A possibility to overcome the problem of organizing a diploma–thesis at a distance university with focus on practice in the design of Application Specific Integrated Circuits (ASICs) is presented with the aid of an example. A student of electrical engineering designed a fast arithmetical unit for use in a digital filter with a VHDL software package (ALLIANCE [see laboratory 1994]) freely distri...

B ( asic ) - Spline Basics

This essay reviews those basic facts about (univariate) B-splines that are of interest in CAGD. The intent is to give a self-contained and complete development of the material in as simple and direct a way as possible. For this reason, the B-splines are defined via the recurrence relations, thus avoiding the discussion of divided differences which the traditional definition of a B-spline as a d...